US 11,658,655 B2
Precharge buffer stage circuit and method
Jesús Bonache Martínez, Valencia (ES); and Italo Carlos Medina Sánchez Castro, Valencia (ES)
Assigned to Analog Devices International Unlimited Company, Limerick (IE)
Filed by Analog Devices International Unlimited Company, Limerick (IE)
Filed on Apr. 15, 2022, as Appl. No. 17/721,590.
Claims priority of provisional application 63/216,367, filed on Jun. 29, 2021.
Prior Publication US 2022/0416781 A1, Dec. 29, 2022
Prior Publication US 2022/0416781 A1, Dec. 29, 2022
Int. Cl. H03K 17/687 (2006.01); H03F 3/45 (2006.01)
CPC H03K 17/687 (2013.01) [H03F 3/45475 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A precharge buffer stage circuit comprising:
an amplifier circuit to precharge a signal chain input capacitance, wherein the amplifier circuit is configured to receive an input voltage;
a precharge switch configured to couple an output node of the amplifier circuit to the signal chain input capacitance;
a bypass switch configured to be coupled between the input voltage and the signal chain input capacitance, wherein the precharge and bypass switches are operated by complementary control signals;
a first resistor-capacitor (RC) network electrically connected between the bypass switch and the input voltage to balance an impedance seen by the bypass switch; and
a perturbation limiter circuit coupled to the output node of the amplifier circuit, wherein the perturbation limiter circuit is configured to stabilize a voltage at the output node of the amplifier circuit such that a charge injection of the precharge switch compensates for a charge injection of the bypass switch.