US 11,658,645 B2
Duty correction device and method, and semiconductor apparatus using the same
Hyun Wook Han, Icheon-si Gyeonggi-do (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si Gyeonggi-do (KR)
Filed on Jul. 1, 2022, as Appl. No. 17/856,469.
Application 17/856,469 is a continuation of application No. 17/174,028, filed on Feb. 11, 2021, granted, now 11,424,735.
Claims priority of application No. 10-2020-0129134 (KR), filed on Oct. 7, 2020.
Prior Publication US 2022/0337228 A1, Oct. 20, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H03K 3/017 (2006.01); H03L 7/081 (2006.01); G06F 1/10 (2006.01); H03K 5/01 (2006.01); G06F 1/06 (2006.01); H03K 5/00 (2006.01)
CPC H03K 3/017 (2013.01) [G06F 1/06 (2013.01); G06F 1/10 (2013.01); H03K 5/00006 (2013.01); H03K 5/01 (2013.01); H03L 7/0812 (2013.01)] 13 Claims
OG exemplary drawing
1. A duty correction device comprising:
a global duty correction circuit configured to perform a global duty correction operation on at least one of a first clock signal and a second clock signal based on a local correction signal; and
a local duty correction circuit configured to perform a local duty correction operation of detecting phases of the first and second clock signals and generate the local correction signal when a number of times that the local duty correction operation is performed corresponds to a threshold value.