US 11,658,627 B2
Amplifier circuit
Wei Shuo Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Apr. 11, 2022, as Appl. No. 17/658,822.
Application 17/658,822 is a continuation of application No. 17/355,491, filed on Jun. 23, 2021.
Claims priority of provisional application 63/166,084, filed on Mar. 25, 2021.
Prior Publication US 2022/0311396 A1, Sep. 29, 2022
Int. Cl. H03F 3/45 (2006.01)
CPC H03F 3/45269 (2013.01) [H03F 2203/45028 (2013.01)] 20 Claims
OG exemplary drawing
1. A circuit comprising:
a positive biasing circuit comprising a drive PMOS, the drive PMOS being configurable to be biased in a subthreshold region;
a negative biasing circuit comprising a drive NMOS, the drive NMOS being configurable to be biased in the subthreshold region; and
an amplification circuit coupled to the positive biasing circuit and the negative biasing circuit, the amplification circuit comprising:
a first stage comprising a first boosting stage;
a second stage comprising a second boosting stage; and
a resistive element coupled between the first stage and the second stage.