US 11,658,616 B2
Method and apparatus to reduce inter symbol interference and adjacent channel interference in mixer and TIA for RF applications
Debopam Banerjee, Bangalore (IN)
Assigned to Analog Devices International Unlimited Company, Limerick (IE)
Filed by Analog Devices International Unlimited Company, Limerick (IE)
Filed on Apr. 22, 2021, as Appl. No. 17/237,887.
Prior Publication US 2022/0345090 A1, Oct. 27, 2022
Int. Cl. H04B 1/16 (2006.01); H03F 1/32 (2006.01); H03F 3/45 (2006.01)
CPC H03F 1/3211 (2013.01) [H03F 3/45475 (2013.01); H04B 1/16 (2013.01); H03F 2200/129 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01)] 17 Claims
OG exemplary drawing
 
11. An electronic system comprising:
a low noise amplifier (LNA) circuit configured to receive a radio frequency (RF) signal when operatively coupled to an RF antenna, wherein the LNA circuit has a differential output including a first amplifier output and a second amplifier output; and
an RF signal circuit path including:
a local oscillator (LO) circuit to produce a LO signal, wherein the LO signal has multiple phases;
a mixer circuit configured to mix the RF signal with the LO signal to produce a mixed RF signal;
a transimpedance amplifier (TIA) circuit to receive the mixed RF signal;
a pass-filter circuit operatively coupled to the TIA circuit; and
an error reduction circuit, operatively coupled to the TIA circuit, configured to reduce voltage error caused by parasitic charge at an output of the LNA circuit, wherein the error reduction circuit includes:
first and second cancellation capacitors coupled respectively to the first and second amplifier outputs; and
a switching circuit configured to apply the parasitic charge to the first and second cancellation capacitors during a first phase of the LO signal and subtract the parasitic charge applied to the first and second cancellation capacitors from the differential output during a second phase of the LO signal.