US 11,658,246 B2
Devices including vertical transistors, and related methods and electronic systems
Kamal M. Karda, Boise, ID (US); Ramanathan Gandhi, Boise, ID (US); Yi Fang Lee, Boise, ID (US); Haitao Liu, Boise, ID (US); Durai Vishak Nirmal Ramaswamy, Boise, ID (US); and Scott E. Sills, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Oct. 8, 2019, as Appl. No. 16/596,370.
Claims priority of provisional application 62/743,133, filed on Oct. 9, 2018.
Prior Publication US 2020/0111919 A1, Apr. 9, 2020
Int. Cl. H01L 29/786 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/441 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/78642 (2013.01) [H01L 21/02178 (2013.01); H01L 21/02565 (2013.01); H01L 21/441 (2013.01); H01L 29/41733 (2013.01); H01L 29/42384 (2013.01); H01L 29/45 (2013.01); H01L 29/66969 (2013.01); H01L 29/7827 (2013.01); H01L 29/7869 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A device, comprising:
a vertical transistor comprising:
a pillar structure comprising:
a source region and a drain region, the source region and the drain region having different material compositions than one another and each individually comprising at least one electrically conductive material that inhibits hydrogen permeation therethrough; and
a channel region comprising a semiconductive material vertically between the source region and the drain regions, the semiconductive material comprising indium oxide and indium gallium zinc oxide;
at least one gate electrode laterally neighboring the channel region of the pillar structure; and
a dielectric material laterally between the pillar structure and the at least one gate electrode; and
a digit line physically contacting the drain region of the vertical transistor and comprising a combination of two or more of titanium, titanium nitride, ruthenium, and tungsten.