US 11,658,231 B2
Semiconductor device
Motohito Hori, Matsumoto (JP); Yoshinari Ikeda, Matsumoto (JP); Akira Hirao, Matsumoto (JP); and Tsunehiro Nakajima, Matsumoto (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed by FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed on Oct. 30, 2020, as Appl. No. 17/85,274.
Claims priority of application No. JP2019-227707 (JP), filed on Dec. 17, 2019.
Prior Publication US 2021/0184023 A1, Jun. 17, 2021
Int. Cl. H01L 29/739 (2006.01); H01L 29/06 (2006.01); H01L 27/06 (2006.01)
CPC H01L 29/7393 (2013.01) [H01L 27/0623 (2013.01); H01L 29/0696 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor module that includes:
a first conductor layer;
a second conductor layer that faces the first conductor layer;
a first semiconductor element that is provided between the first conductor layer and the second conductor layer, and that has
a first control electrode,
a first positive electrode electrically connected to the first conductor layer, and
a first negative electrode electrically connected to the second conductor layer;
a positive electrode terminal provided on an edge portion of the first conductor layer at a first side of the semiconductor module in a top view of the semiconductor module;
a negative electrode terminal provided on an edge portion of the second conductor layer at the first side of the semiconductor module in the top view thereof;
control wiring that is electrically connected to the first control electrode, and that extends out of the first conductor layer and the second conductor layer at a second side of the semiconductor module that is opposite to the first side in the top view; and
a control terminal that is electrically connected to the control wiring, that is positioned outside the first conductor layer and the second conductor layer in the top view, and that has an end portion that is aligned with the positive electrode terminal and the negative electrode terminal.