US 11,658,225 B2
Fin field-effect transistor and method of forming the same
Yu-Chi Pan, Zhubei (TW); Ying-Liang Chuang, Zhubei (TW); Ming-Hsi Yeh, Hsinchu (TW); and Kuo-Bin Huang, Jhubei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 27, 2022, as Appl. No. 17/874,772.
Application 17/874,772 is a continuation of application No. 17/097,499, filed on Nov. 13, 2020, granted, now 11,404,552.
Prior Publication US 2022/0359692 A1, Nov. 10, 2022
Int. Cl. H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 27/088 (2006.01); H01L 29/51 (2006.01); H01L 21/28 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 21/8234 (2006.01); H01L 21/311 (2006.01)
CPC H01L 29/42368 (2013.01) [H01L 21/28185 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/513 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7856 (2013.01); H01L 21/31122 (2013.01); H01L 21/82345 (2013.01)] 20 Claims
OG exemplary drawing
 
8. A semiconductor device, comprising:
a fin structure disposed over a substrate;
a first dielectric layer disposed over the fin structure;
a gate dielectric layer disposed along sidewalls of the first dielectric layer;
a second dielectric layer disposed over a top portion of the fin structure, wherein the second dielectric layer directly contacts both the first dielectric layer and the gate dielectric layer; and
a gate structure disposed over the fin structure.