US 11,658,222 B2
Thin film transistor with charge trap layer
Abhishek A. Sharma, Hillsboro, OR (US); Van H. Le, Beaverton, OR (US); Jack T. Kavalieros, Portland, OR (US); Tahir Ghani, Portland, OR (US); Gilbert Dewey, Hillsoboro, OR (US); Shriram Shivaraman, Hillsboro, OR (US); Sean T. Ma, Portland, OR (US); and Benjamin Chu-Kung, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Appl. No. 16/633,603
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Sep. 27, 2017, PCT No. PCT/US2017/053588
§ 371(c)(1), (2) Date Jan. 24, 2020,
PCT Pub. No. WO2019/066790, PCT Pub. Date Apr. 4, 2019.
Prior Publication US 2020/0185504 A1, Jun. 11, 2020
Int. Cl. H01L 29/423 (2006.01); H01L 29/40 (2006.01); H01L 29/51 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/4234 (2013.01) [H01L 29/40117 (2019.08); H01L 29/518 (2013.01); H01L 29/66833 (2013.01); H01L 29/786 (2013.01)] 19 Claims
OG exemplary drawing
1. An apparatus comprising:
an interlayer dielectric (ILD) layer between first and second metal interconnect layers;
a thin film transistor (TFT) comprising:
source, drain, and gate contacts;
a semiconductor material, comprising a channel, between the ILD layer and the second metal interconnect layer;
a gate dielectric layer between the gate contact and the channel; and
an additional layer between the channel and the ILD layer;
wherein (a)(i) the channel includes majority carriers selected from the group consisting of hole carriers or electron carriers, (a)(ii) the additional layer includes an insulator material that includes charged particles having a polarity equal to a polarity of the majority carriers.