US 11,658,214 B2
MOSFET device with undulating channel
Kevin Kyuheon Cho, Bucheon-si (KR); Bongyong Lee, Seoul (KR); Kyeongseok Park, Bucheon (KR); Doojin Choi, Gimpo-si (KR); Thomas Neyer, Munich (DE); and Ki Min Kim, Seoul (KR)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Jan. 12, 2021, as Appl. No. 17/248,160.
Prior Publication US 2022/0223691 A1, Jul. 14, 2022
Int. Cl. H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/1608 (2013.01) [H01L 29/1045 (2013.01); H01L 29/66068 (2013.01); H01L 29/66712 (2013.01); H01L 29/7802 (2013.01)] 16 Claims
OG exemplary drawing
 
12. A Silicon Carbide (SiC) semiconductor device, comprising:
a substrate;
a drift region of the first conductivity type and having a first doping concentration disposed on the substrate;
a channel region of a second conductivity type within the drift region, the channel region having an undulating channel edge along a longitudinal axis;
a source region of the first conductivity type disposed within the channel region;
a plurality of junction field effect transistor (JFET) regions between the channel region and the drift region, the plurality of JFET regions having widths that alternate in correspondence with undulations of the undulating channel edge, the plurality of JFET regions being of the first conductivity type and having a second doping concentration that is greater than the first doping concentration of the drift region;
gates disposed along the longitudinal axis and on at least a portion of the source region, the channel region, and the plurality of JFET regions;
a first cross-sectional area orthogonal to the longitudinal axis, in which the channel region has a first width; and
a second cross-sectional area orthogonal to the longitudinal axis, in which the channel region has a second width that is smaller than the first width,
wherein the channel region includes a heavily-doped channel region between the source region and a lightly-doped channel region of the channel region, and the lightly-doped channel region is between the heavily-doped channel region and a JFET region of the plurality of JFET regions.