US 11,658,206 B2
Deep trench structure for a capacitive device
En-Shuo Lin, Hsinchu (TW); Sheng Ko, Hsinchu (TW); Chi-Fu Lin, Zhubei (TW); Che-Yi Lin, Hsinchu (TW); and Clark Lee, Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Nov. 13, 2020, as Appl. No. 16/949,769.
Prior Publication US 2022/0157929 A1, May 19, 2022
Int. Cl. H01L 49/02 (2006.01); H01L 23/64 (2006.01); H01G 4/005 (2006.01); H01G 4/35 (2006.01)
CPC H01L 28/65 (2013.01) [H01G 4/005 (2013.01); H01G 4/35 (2013.01); H01L 23/642 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A capacitive device, comprising:
a first electrode;
a second electrode;
a third electrode;
a first deep trench structure between the first electrode and the second electrode,
wherein a bottom of the first deep trench structure is in a first over-etch region that is below a surface of an interlayer dielectric (ILD) layer, and
wherein the ILD layer is below the first electrode, the second electrode, and the third electrode;
a second deep trench structure between the second electrode and the third electrode,
wherein a bottom of the second deep trench structure is in a second over-etch region that is below the surface of the ILD layer; and
a dielectric layer in the first deep trench structure and the second deep trench structure.