US 11,658,168 B2
Flash memory with improved bandwidth
Fei Xue, Sunnyvale, CA (US); Shuangchen Li, Sunnyvale, CA (US); Dimin Niu, Sunnyvale, CA (US); and Hongzhong Zheng, Sunnyvale, CA (US)
Assigned to Alibaba Group Holding Limited
Filed by Alibaba Group Holding Limited, George Town (KY)
Filed on Aug. 5, 2020, as Appl. No. 16/985,672.
Prior Publication US 2022/0045044 A1, Feb. 10, 2022
Int. Cl. H01L 25/18 (2006.01); H01L 25/065 (2023.01); H01L 25/00 (2006.01); G11C 16/26 (2006.01); G11C 16/24 (2006.01); G11C 16/04 (2006.01)
CPC H01L 25/18 (2013.01) [G11C 16/0483 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2225/06541 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A flash memory device, comprising:
a plurality of flash memory cell arrays, wherein:
a flash memory cell array in the plurality of flash memory cell arrays comprises a plurality of layers of flash memory cells; and
the plurality of layers of flash memory cells are organized into a plurality of flash memory cell planes;
a logic circuitry coupled to the plurality of flash memory cell arrays, configured to perform operations using the plurality of flash memory cell arrays; and
a sensing circuitry comprising a plurality of sensing circuits, wherein a sensing circuit in the plurality of sensing circuits is configured to access a corresponding flash memory cell plane among the plurality of flash memory cell planes, wherein:
the plurality of sensing circuits are formed in one or more separate dies than the logic circuitry.