US 11,658,153 B2
Forming recesses in molding compound of wafer to reduce stress
Chun-Hung Lin, Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 27, 2020, as Appl. No. 16/884,773.
Application 16/884,773 is a continuation of application No. 15/289,681, filed on Oct. 10, 2016, granted, now 10,685,936.
Application 15/289,681 is a continuation of application No. 14/175,080, filed on Feb. 7, 2014, granted, now 9,472,481, issued on Oct. 18, 2016.
Prior Publication US 2020/0286863 A1, Sep. 10, 2020
Int. Cl. H01L 21/31 (2006.01); H01L 25/065 (2023.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 21/784 (2006.01)
CPC H01L 25/0657 (2013.01) [H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 21/784 (2013.01); H01L 23/315 (2013.01); H01L 23/3114 (2013.01); H01L 23/3192 (2013.01); H01L 24/11 (2013.01); H01L 24/14 (2013.01); H01L 24/19 (2013.01); H01L 24/94 (2013.01); H01L 23/562 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/92 (2013.01); H01L 24/96 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05022 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/11009 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13014 (2013.01); H01L 2224/13016 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13023 (2013.01); H01L 2224/14131 (2013.01); H01L 2224/14133 (2013.01); H01L 2224/14134 (2013.01); H01L 2224/14179 (2013.01); H01L 2224/16147 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/94 (2013.01); H01L 2225/06513 (2013.01); H01L 2924/1032 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10271 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/181 (2013.01); H01L 2924/18162 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit structure comprising:
a chip comprising:
a semiconductor substrate;
a first plurality of electrical connectors over the semiconductor substrate;
a molding compound molding lower parts of the first plurality of electrical connectors therein, wherein a top surface of the molding compound is lower than top ends of the first plurality of electrical connectors; and
a plurality of recesses extending into the molding compound, wherein the plurality of recesses are aligned to a first ring encircling the first plurality of electrical connectors.