US 11,658,123 B2
Hybrid bridged fanout chiplet connectivity
Rahul Agarwal, Santa Clara, CA (US); and Milind S. Bhagavat, Broomfield, CO (US)
Assigned to ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed by ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed on Sep. 25, 2020, as Appl. No. 17/32,544.
Prior Publication US 2022/0102276 A1, Mar. 31, 2022
Int. Cl. H01L 23/538 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/5381 (2013.01) [H01L 24/13 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 24/82 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/24991 (2013.01); H01L 2224/25171 (2013.01); H01L 2224/25174 (2013.01); H01L 2224/25177 (2013.01); H01L 2224/82801 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A chip for hybrid bridged fanout chiplet connectivity, the chip comprising:
a central chiplet;
one or more first chiplets each coupled to the central chiplet using a plurality of fanout traces and not connected to the central chiplet using an interconnect die; and
one or more second chiplets each coupled to the central chiplet using one or more interconnect dies (ICDs), wherein the one or more interconnect dies are in a layer that does not include the plurality of fanout traces.