US 11,657,886 B2
Intelligent proactive responses to operations to read data from memory cells
Sivagnanam Parthasarathy, Carlsbad, CA (US); James Fitzpatrick, Laguna Niguel, CA (US); Patrick Robert Khayat, San Diego, CA (US); and AbdelHakim S. Alhussien, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 11, 2021, as Appl. No. 17/346,125.
Application 17/346,125 is a continuation of application No. 16/869,494, filed on May 7, 2020, granted, now 11,081,200.
Prior Publication US 2021/0350869 A1, Nov. 11, 2021
Int. Cl. G11C 16/30 (2006.01); G11C 29/12 (2006.01); G11C 29/14 (2006.01); G11C 29/44 (2006.01); G11C 16/26 (2006.01); G11C 29/34 (2006.01)
CPC G11C 29/12005 (2013.01) [G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 29/14 (2013.01); G11C 29/34 (2013.01); G11C 29/44 (2013.01)] 20 Claims
OG exemplary drawing
1. A device, comprising:
memory cells; and
a logic circuit configured to, in response to receiving a first command to read the memory cells:
determine an operation based on quality of first data retrievable from the memory cells; and
initiate the operation before the device receives a subsequent second command following a response to the first command.