CPC G06N 3/063 (2013.01) [G06F 17/16 (2013.01); G06N 3/08 (2013.01); G06N 20/10 (2019.01)]  14 Claims 
1. An apparatus for processing data that includes vector element values of an input vector and matrix element values of a model matrix, the apparatus comprising:
a clock module configured to provide a clock signal associated with the data;
a vectormatrix multiplication module configured to receive a set of matrix element values for performing a vectormatrix multiplication, and
a computing subsystem configured to process data based on the clock signal, the processing including:
loading the vectormatrix multiplication module with a core matrix,
computing a plurality of intermediate vectors based on elementwise vector multiplication between different subsets of the vector element values and different respective preprocessing vectors, where the number of cycles of the clock signal used to compute the plurality of intermediate vectors is less than a number of cycles used to load the core matrix, and
multiplying the input vector by the model matrix based on separately multiplying each of the intermediate vectors by the loaded core matrix.
