US 11,657,004 B2
Method and system for memory attack mitigation
Sudhanva Gurumurthi, Austin, TX (US); and Vilas K. Sridharan, Boxborough, MA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Dec. 17, 2020, as Appl. No. 17/125,978.
Prior Publication US 2022/0197827 A1, Jun. 23, 2022
Int. Cl. G06F 12/14 (2006.01); G06F 12/1009 (2016.01); G06F 21/79 (2013.01); G06F 12/0871 (2016.01); G06F 12/0882 (2016.01)
CPC G06F 12/1433 (2013.01) [G06F 12/0871 (2013.01); G06F 12/0882 (2013.01); G06F 12/1009 (2013.01); G06F 21/79 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for memory attack mitigation in a memory device, comprising:
receiving, at a memory controller, an allocation of a page in memory;
setting, by the one or more device controllers, an adjacent detect bit based on an address of the allocated page in memory being part of an aggressor-victim set within the memory; and
identifying the address of the allocated page in memory for further action.