US 11,657,002 B2
Memory management unit (MMU) for accessing borrowed memory
Samuel E. Bradshaw, Sacramento, CA (US); Ameen D. Akel, Rancho Cordova, CA (US); Kenneth Marion Curewitz, Cameron Park, CA (US); Sean Stephen Eilert, Penryn, CA (US); and Dmitri Yudanov, Rancho Cordova, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 14, 2021, as Appl. No. 17/375,455.
Application 17/375,455 is a continuation of application No. 16/424,420, filed on May 28, 2019, granted, now 11,100,007.
Prior Publication US 2021/0342274 A1, Nov. 4, 2021
Int. Cl. G06F 12/1027 (2016.01); H04W 84/04 (2009.01)
CPC G06F 12/1027 (2013.01) [G06F 2212/657 (2013.01); G06F 2212/68 (2013.01); H04W 84/042 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
a translation lookaside buffer; and
a logic circuit coupled to the translation lookaside buffer and configured to:
translate a virtual memory address into a physical memory address according to a virtual to physical memory map in the translation lookaside buffer; and
access a memory, via a memory bus or a network communication interface, in accordance with the physical memory address;
wherein in response to a remote computing apparatus lending a first random access memory of the remote computing apparatus to the device, the logic circuit is configured to change from mapping a first virtual memory region to a local memory accessible via the memory bus to mapping the first virtual memory region to a remote memory within the first random access memory of the remote computing apparatus accessible via the network communication interface.