US 11,656,899 B2
Virtualization of process address space identifiers for scalable virtualization of input/output devices
Sanjay Kumar, Hillsboro, OR (US); Rajesh M. Sankaran, Portland, OR (US); Gilbert Neiger, Portland, OR (US); Philip R. Lantz, Cornelius, OR (US); Jason W. Brandt, Austin, TX (US); Vedvyas Shanbhogue, Austin, TX (US); Utkarsh Y. Kakaiya, Folsom, CA (US); and Kun Tian, Shanghai (CN)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 17, 2021, as Appl. No. 17/404,897.
Application 17/404,897 is a continuation of application No. 16/481,441, granted, now 11,099,880, previously published as PCT/CN2017/074370, filed on Feb. 22, 2017.
Prior Publication US 2021/0373934 A1, Dec. 2, 2021
Int. Cl. G06F 9/455 (2018.01); G06F 9/30 (2018.01); G06F 12/1045 (2016.01); G06F 12/109 (2016.01)
CPC G06F 9/45558 (2013.01) [G06F 9/30138 (2013.01); G06F 12/109 (2013.01); G06F 12/1063 (2013.01); G06F 2009/45579 (2013.01); G06F 2212/152 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a decoder to decode an enqueue instruction, the enqueue instruction to reference a first process address space identifier (PASID); and
execution circuitry, coupled to the decoder, the execution circuitry to perform one or more operations corresponding to the enqueue instruction, wherein execution of the enqueue instruction is to include:
translating, using a PASID translation data structure associated with a virtual machine, the first PASID to a second PASID;
including, in a command, the second PASID instead of the first PASID; and
submitting the command to a device for processing.