US 11,656,785 B2
Apparatus and method for erasing data programmed in a non-volatile memory block in a memory system
Jong-Min Lee, Seoul (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Aug. 26, 2021, as Appl. No. 17/412,568.
Application 17/412,568 is a continuation of application No. 16/678,771, filed on Nov. 8, 2019.
Claims priority of application No. 10-2019-0003825 (KR), filed on Jan. 11, 2019.
Prior Publication US 2021/0382647 A1, Dec. 9, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/04 (2006.01); G06F 3/06 (2006.01)
CPC G06F 3/0652 (2013.01) [G06F 3/0608 (2013.01); G06F 3/0673 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system, comprising:
a memory device including a plurality of memory blocks and configured to perform a first erase operation of a two-step erase operation to at least one erase target block among the plurality of memory blocks, perform an erase verification operation corresponding to the first erase operation to the at least one erase target block, perform a second erase operation of the two-step erase operation to the at least one erase target block based on the verification result, and output a result of the two-step erase operation; and
a controller in communication with the memory device, the controller configured to allocate the at least one erase target block for at least one program target block and transmit a request for programming data in the at least one program target block, based on the result of the two-step erase operation.