US 11,656,646 B2
Managing reference voltages in memory systems
Shang-Chi Yang, Changhua (TW); and Jian-Syu Lin, Chiayi (TW)
Assigned to Macronix International Co., Ltd., Hsinchu (TW)
Filed by Macronix International Co., Ltd., Hsinchu (TW)
Filed on Dec. 28, 2020, as Appl. No. 17/135,131.
Claims priority of provisional application 63/054,234, filed on Jul. 20, 2020.
Prior Publication US 2022/0019254 A1, Jan. 20, 2022
Int. Cl. G05F 3/26 (2006.01); G11C 5/14 (2006.01)
CPC G05F 3/262 (2013.01) [G11C 5/147 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
an operational amplifier (OPA);
an output circuitry; and
a compensation circuitry,
wherein the operational amplifier is configured to receive input voltages from the output circuitry and a supply voltage and output a gate control voltage based on the input voltages and the supply voltage,
wherein the output circuitry is configured to receive the gate control voltage from the operational amplifier and the supply voltage, provide the input voltages to the operational amplifier, and output a reference voltage, and
wherein the compensation circuitry is coupled to the output circuitry and configured to output a compensation current to the output circuitry to compensate the output circuitry such that the reference voltage is substantially constant,
wherein the output circuitry is configured to generate the reference voltage based on the gate control voltage and the compensation current,
wherein the operational amplifier comprises at least two transistors, and gates of the at least two transistors are coupled together to receive a second gate control voltage, and wherein the compensation circuitry is coupled to the operational amplifier and configured to receive the second gate control voltage, generate the compensation current based on the second gate control voltage, and provide the compensation current to the output circuitry, and
wherein the compensation circuitry comprises one or more transistors corresponding to one or more transistors in the operational amplifier, such that the compensation current flowing from the one or more transistors in the compensation circuitry is proportional to and smaller than a corresponding current flowing from the one or more transistors in the operational amplifier.