US 11,656,642 B2
Slew rate improvement in multistage differential amplifiers for fast transient response linear regulator applications
Murat Sekerli, San Jose, CA (US); and Matthew Winslow Oesting, San Jose, CA (US)
Assigned to Analog Devices, Inc., Wilmington, MA (US)
Filed by Analog Devices, Inc., Wilmington, MA (US)
Filed on Feb. 5, 2021, as Appl. No. 17/168,735.
Prior Publication US 2022/0253082 A1, Aug. 11, 2022
Int. Cl. H03F 3/45 (2006.01); G05F 1/575 (2006.01)
CPC G05F 1/575 (2013.01) [H03F 3/45475 (2013.01); H03F 2200/129 (2013.01); H03F 2203/45116 (2013.01)] 22 Claims
OG exemplary drawing
 
1. An electronic circuit comprising:
an error amplifier having an output stage including a differential input to single ended output amplifier that includes a frequency compensation resistor;
a first switch circuit connected across the frequency compensation resistor, wherein activating the first switch circuit shunts the frequency compensation resistor; and
an overshoot and undershoot detection circuit configured to compare differential input nodes of the output amplifier to a baseline voltage signal and activate the first switch circuit when detecting an overshoot condition or an undershoot condition using the baseline voltage signal.