US 11,656,553 B2
Method for forming semiconductor structure
Li-Yen Lin, Wujie Township, Yilan County (TW); Ching-Yu Chang, Yuansun Village (TW); and Chin-Hsiang Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on May 10, 2021, as Appl. No. 17/315,595.
Application 17/315,595 is a division of application No. 16/150,789, filed on Oct. 3, 2018, granted, now 11,003,084.
Claims priority of provisional application 62/581,125, filed on Nov. 3, 2017.
Prior Publication US 2021/0263419 A1, Aug. 26, 2021
Int. Cl. G03F 7/20 (2006.01); G03F 7/16 (2006.01); H01L 21/311 (2006.01); H01L 21/033 (2006.01); G03F 7/09 (2006.01); G03F 7/039 (2006.01); H01L 21/027 (2006.01); G03F 7/004 (2006.01)
CPC G03F 7/70025 (2013.01) [G03F 7/0045 (2013.01); G03F 7/0397 (2013.01); G03F 7/094 (2013.01); G03F 7/168 (2013.01); G03F 7/70033 (2013.01); H01L 21/0273 (2013.01); H01L 21/0332 (2013.01); H01L 21/31105 (2013.01); H01L 21/31144 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
forming a material layer over a substrate;
forming a resist layer over the material layer;
exposing a portion of the resist layer, wherein the resist layer comprises a photoacid generator (PAG) group, a quencher group, an acid-labile group (ALG) and a polar unit (PU);
performing a baking process on the resist layer;
developing the resist layer to form a patterned resist layer;
doping a portion of the material layer by using the patterned resist layer as a mask to form a doped region; and
removing the patterned resist layer.