US 12,310,085 B2
Semiconductor device
Yuzo Fukuzaki, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed on Jun. 23, 2023, as Appl. No. 18/340,619.
Application 18/340,619 is a continuation of application No. 17/409,293, filed on Aug. 23, 2021, granted, now 11,728,403.
Application 17/409,293 is a continuation of application No. 16/964,230, granted, now 11,133,396, issued on Sep. 28, 2021, previously published as PCT/JP2018/047706, filed on Dec. 26, 2018.
Claims priority of application No. 2018-013471 (JP), filed on Jan. 30, 2018.
Prior Publication US 2023/0352555 A1, Nov. 2, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 29/78 (2006.01); H10D 62/10 (2025.01); H10D 62/17 (2025.01); H10D 64/68 (2025.01)
CPC H10D 64/681 (2025.01) [H10D 62/119 (2025.01); H10D 62/235 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a stacked structure having channel formation region layers and gate electrode layers alternately arranged on top of each other on a base,
wherein a lowermost layer of the stacked structure is formed with a 1st layer of the gate electrode layers,
wherein an uppermost layer of the stacked structure is formed with an Nth (where N≥3) layer of the gate electrode layers,
wherein a first end face of an odd-numbered layer of the gate electrode layers is in contact with a first contact portion,
wherein a third end face of an even-numbered layer of the gate electrode layers is in contact with a second contact portion,
wherein a gate insulating film is provided between each of the gate electrode layers, and
wherein each gate insulating film is in contact with each of the first contact portion and the second contact portion.