US 12,310,083 B2
Semiconductor device and method for forming the same
Chang-Po Hsiung, Hsinchu (TW); and Ching-Chung Yang, Hsinchu (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Dec. 2, 2021, as Appl. No. 17/540,249.
Claims priority of application No. 202111260667.1 (CN), filed on Oct. 28, 2021.
Prior Publication US 2023/0140347 A1, May 4, 2023
Int. Cl. H01L 29/423 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H10D 30/01 (2025.01); H10D 30/60 (2025.01); H10D 64/01 (2025.01); H10D 64/27 (2025.01)
CPC H10D 64/513 (2025.01) [H01L 21/02236 (2013.01); H01L 21/28211 (2013.01); H10D 30/022 (2025.01); H10D 30/601 (2025.01); H10D 64/017 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
an active region in the substrate;
a recessed region in the active region;
a gate dielectric layer deposited on the substrate in the recessed region, wherein an edge portion of the gate dielectric layer comprises a rounded profile;
a gate structure on the gate dielectric layer, wherein in a plan view, an overlapping region of the active region and the gate structure is smaller than and completely overlapped with the recessed region; and
a source/drain region in the active region and at a side of the gate structure, wherein the source/drain region directly contacts the edge portion of the gate dielectric layer.