US 12,310,070 B2
Semiconductor device and method of manufacturing the same
Pei-Yu Chou, Hsinchu County (TW); and Tze-Liang Lee, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Jan. 4, 2024, as Appl. No. 18/404,855.
Application 18/404,855 is a continuation of application No. 17/383,828, filed on Jul. 23, 2021, granted, now 11,901,409.
Prior Publication US 2024/0145535 A1, May 2, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/94 (2006.01); H01L 29/76 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 62/115 (2025.01) [H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 62/149 (2025.01); H10D 84/0151 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
an interlayer dielectric (ILD) disposed on the substrate;
a conductive layer disposed on the substrate and spaced apart from the ILD by an air gap, wherein the ILD is tapered toward the substrate; and
an etching stop layer disposed over the ILD, wherein the etching stop layer has a lower surface covering the ILD and exposed to the air gap.