US 12,310,022 B2
3D capacitor stack and method of fabricating the stack
Jong-Ho Lee, Seoul (KR); Young-Tak Seo, Seongnam-si (KR); Soochang Lee, Seoul (KR); Seongbin Oh, Seoul (KR); and Jangsaeng Kim, Seoul (KR)
Assigned to SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION, Seoul (KR)
Filed by Seoul National University R&DB FOUNDATION, Seoul (KR)
Filed on Aug. 16, 2022, as Appl. No. 17/888,778.
Claims priority of provisional application 63/233,939, filed on Aug. 17, 2021.
Prior Publication US 2023/0057424 A1, Feb. 23, 2023
Int. Cl. H10B 43/27 (2023.01); G06N 3/063 (2023.01); G11C 16/08 (2006.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); H10B 51/20 (2023.01); H10B 51/40 (2023.01); G11C 16/04 (2006.01)
CPC H10B 43/27 (2023.02) [G06N 3/063 (2013.01); G11C 16/08 (2013.01); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H10B 51/20 (2023.02); H10B 51/40 (2023.02); G11C 16/0483 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A three-dimensional capacitor stack, which comprises:
a substrate having an upper surface formed of a first oxide layer;
a channel hole positioned on the substrate in a vertical direction and provided in a form of a pillar shape, the inside of which is filled with an insulating material;
a semiconductor body positioned on the outer circumferential surface of the channel hole and made of a semiconductor material;
a plurality of first insulating layers positioned on an outer circumferential surface of the semiconductor body;
a plurality of sources positioned on a first side surface of an outer circumferential surface of the semiconductor body;
a plurality of drains positioned on a second side surface of an outer circumferential surface of the semiconductor body opposite to the first side surface;
a plurality of word lines positioned on a third side surface of the outer peripheral surface of the semiconductor body located between the sources and the drains;
a plurality of insulator stacks positioned between the word lines and the semiconductor body;
a source line electrode positioned on a substrate in a vertical direction, provided in a form of a pillar shape, and electrically connected to the plurality of sources; and
a drain line electrode positioned on a substrate in a vertical direction, provided in a form of a pillar shape, and electrically connected to the plurality of drains,
wherein the first insulating layers and the sources are alternately stacked on a first side surface of the outer peripheral surface of the semiconductor body, the first insulating layers and drains are alternately stacked on the second side surface of the outer peripheral surface of the semiconductor body, and the first insulating layers and word lines surrounded by the insulator stacks are alternately stacked on the third side of the outer circumferential surface of the semiconductor body;
the semiconductor body, the source, the drain, the word line and the insulator stack located on the same layer on the side of the channel hole constitute a capacitor device; and
the capacitor devices electrically isolated from each other by the first insulating layers are vertically stacked to form a stack structure.