US 12,310,012 B2
Semiconductor device and method of manufacturing semiconductor device
Ki Hong Lee, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jul. 6, 2021, as Appl. No. 17/368,567.
Claims priority of application No. 10-2021-0001543 (KR), filed on Jan. 6, 2021.
Prior Publication US 2022/0216225 A1, Jul. 7, 2022
Int. Cl. H10B 41/27 (2023.01); G11C 5/06 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01)
CPC H10B 41/27 (2023.02) [G11C 5/06 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a gate structure including alternately stacked conductive layers and insulating layers;
channel structures passing through the gate structure; and
contact plugs respectively connected to the conductive layers,
wherein each of the conductive layers includes a first portion having a first thickness and a second portion having a second thickness thicker than the first thickness,
the second portion includes a first metal layer, a second metal layer in the first metal layer, the second metal layer being formed only in the second portion, and a first barrier layer interposed between the first metal layer and the second metal layer, and
the first portion includes the first metal layer and the first barrier layer of which an upper portion and a lower portion are connected to the first metal layer.