| CPC H10B 41/27 (2023.02) [H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02)] | 20 Claims |

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1. A three-dimensional (3D) memory device, comprising:
a stack structure comprising interleaved conductive layers and dielectric layers;
a channel structure extending through the stack structure, the channel structure comprising a memory film and a semiconductor channel, wherein the semiconductor channel comprises a doped portion, and a part of the doped portion of the semiconductor channel extends beyond the stack structure in a first direction; and
a doped semiconductor layer comprising a plate and a plug extending from the plate into the channel structure, wherein the doped portion of the semiconductor channel circumscribes the plug of the doped semiconductor layer.
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