US 12,310,009 B2
Read-only memory with vertical transistors
Tenko Yamashita, Schenectady, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Nov. 11, 2022, as Appl. No. 18/054,835.
Application 18/054,835 is a division of application No. 17/064,285, filed on Oct. 6, 2020, granted, now 11,545,499.
Prior Publication US 2023/0076056 A1, Mar. 9, 2023
Int. Cl. H10B 20/00 (2023.01); G11C 17/12 (2006.01); H10B 20/25 (2023.01); H10D 30/01 (2025.01); H10D 64/01 (2025.01)
CPC H10B 20/38 (2023.02) [G11C 17/12 (2013.01); H10B 20/25 (2023.02); H10D 30/025 (2025.01); H10D 64/021 (2025.01)] 8 Claims
OG exemplary drawing
 
1. A method of programming a ROM device, the method comprising:
determining a value to be programmed into each of a plurality of ROM cells in a ROM device, wherein each ROM cell comprises a vertical transport field effect transistor (VFET), a respective un-activated semiconductor layer upon the VFET, a deterioration barrier upon sidewall(s) of the un-active semiconductor layer, and a conductive contact upon the deterioration barrier, wherein the un-activated semiconductor layer includes chemical dopants that have not been substantially activated; and
applying an activation voltage to respective conductive contacts of a first set of one or more ROM cells to activate chemical dopants implanted in the respective un-activated semiconductor layers, wherein activation of the chemical dopants changes a resistance of the first set of one or more ROM cells to program the first set of one or more ROM cells to respectively store a first value, and wherein a second set of one or more ROM cells to which the activation voltage is not applied are programmed to store a second value.