US 12,309,992 B2
Semiconductor structure and formation method thereof, and memory
Guangsu Shao, Hefei (CN); and Deyuan Xiao, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Aug. 3, 2022, as Appl. No. 17/879,790.
Claims priority of application No. 202210557099.X (CN), filed on May 20, 2022.
Prior Publication US 2023/0380131 A1, Nov. 23, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/00 (2023.02) 16 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
providing a substrate;
forming a first active layer on a side of the substrate, the first active layer comprising a plurality of active areas arranged at intervals;
forming a first word line in each of the plurality of active areas;
forming a first bit line and a conductive contact plug on a top of the first active layer, the first bit line, the conductive contact plug and the first word line being insulated from one another;
forming a gate dielectric layer on a side of the first active layer, a side of the first bit line, and a side of the conductive contact plug facing away from the substrate, respectively;
forming a second active layer on a side of the gate dielectric layer facing away from the substrate; and
forming a second bit line and a second word line on a side of the second active layer facing away from the substrate, the second bit line and the second word line touching and connecting the second active layer, respectively.