US 12,309,033 B2
Network timing topology discovery and visualization using interior gateway protocols
Gregory Vanderydt, Ottawa (CA); Kevin Estabrooks, Nepean (CA); and Bashar Abdullah, Kanata (CA)
Assigned to Ciena Corporation, Hanover, MD (US)
Filed by Ciena Corporation, Hanover, MD (US)
Filed on Aug. 18, 2021, as Appl. No. 17/405,180.
Prior Publication US 2023/0057463 A1, Feb. 23, 2023
Int. Cl. H04L 41/12 (2022.01); H04L 41/22 (2022.01); H04L 43/106 (2022.01)
CPC H04L 41/12 (2013.01) [H04L 41/22 (2013.01); H04L 43/106 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A non-transitory computer-readable medium having instructions stored thereon for programming at least one processor to perform steps of:
receiving Interior Gateway Protocol (IGP) messages from one or more network elements in a network;
extracting timing information directly from any of the IGP messages where the timing information specifies a selected timing reference for a given network element for any of frequency, phase, and time, wherein the timing reference is inserted in the any of the IGP messages and the timing reference identifies an input to a given network element of the one or more network elements the timing reference determines accuracy of a system clock associated with the given network element, the accuracy is a class of the plurality of classes;
storing the timing information; and
displaying a Graphical User Interface of the network including an operational timing trail for any of frequency, phase, and time, wherein the operational timing trail includes a path of the one or more network elements illustrating associated timing references.