| CPC H04L 1/0071 (2013.01) [H03M 13/13 (2013.01); H03M 13/27 (2013.01); H04L 1/0057 (2013.01)] | 30 Claims |

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1. A wireless communication device, comprising:
a processing system that includes processor circuitry and memory circuitry that stores code, the processing system configured to cause the wireless communication device to:
encode an information bit vector into a plurality of code blocks using a polar code that is partitioned into a plurality of sub-blocks having a same block length in accordance with a polar transformation associated with a modulation scheme, each code block of the plurality of code blocks being encoded using a respective sub-block of the plurality of sub-blocks;
interleave respective bits of each code block of the plurality of code blocks using a respective interleaver of a plurality of interleavers; and
transmit the respective interleaved bits of each code block of the plurality of code blocks over a respective bit channel of a plurality of bit channels, each bit channel of the plurality of bit channels being associated with a respective reliability.
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