US 12,308,860 B2
Apparatus for mitigating nonlinearity-induced spurs and noise in a fractional-N frequency synthesizer
Valerio Mazzaro, Pavia (IT); and Michael Peter Kennedy, Dublin (IE)
Assigned to University College Dublin, Dublin (IE)
Filed by University College Dublin, Dublin (IE)
Filed on Dec. 20, 2022, as Appl. No. 18/085,066.
Claims priority of provisional application 63/292,350, filed on Dec. 21, 2021.
Prior Publication US 2023/0198547 A1, Jun. 22, 2023
Int. Cl. H03M 7/32 (2006.01); H03M 7/36 (2006.01)
CPC H03M 7/3008 (2013.01) [H03M 7/3026 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A fractional-N PLL device, comprising:
a voltage controlled oscillator;
a phase-locked loop comprising a multimodulus divider, wherein the phase-locked loop generates an output frequency from the controlled oscillator; and
a digital delta-sigma modulator (DDSM) configured to provide a sequence of integers to control the multimodulus divider to settle to a desired fraction,
wherein the DDSM is configured to generate an output signal y[n] responsive to an input signal x[n], a quantization error signal e[n] and a dither signal d[n] in accordance with an equation defined in the z domain as:
Y(z)=STF(z)X(z)+DTF(z)D(z)−NTF(z)E(z),
wherein Y(z), X(z), D(z) and E(z) are z-transforms of the output signal, the input signal, the dither signal, and the quantization error signal, and
wherein STF(z), DTF(z) and NTF(z) correspond to a transfer function of the input signal, a transfer function of the dither signal, and a transfer function of the quantization error signal, and wherein the transfer function of the quantization error signal is of the form:

OG Complex Work Unit Math
where A, Q and K are constants, coefficients ci are real valued and cK≠0 and wherein at least one of the zeroes zj of

OG Complex Work Unit Math
satisfies zj≠+1 for j=1, 2, . . . , K.