| CPC H03L 7/0891 (2013.01) | 8 Claims |

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1. A clock generation circuit comprising:
an initialization control circuit generating a first initialization signal and a second initialization signal, which transition at different time points, based on a control pulse signal;
a first clock generation circuit generating a first phase clock signal and a second phase clock signal having different phases from each other through a synchronization operation based on the first initialization signal; and
a second clock generation circuit generating a third phase clock signal and a fourth phase clock signal having different phases from each other through a synchronization operation based on the second initialization signal
wherein the control pulse signal includes a pulse corresponding to a half period of a target phase clock signal, and
wherein the initialization control circuit controls a time point when the first initialization signal transitions based on a first edge of the pulse included in the control pulse signal and controls a time point when the second initialization signal transitions based on a second edge of the pulse included in the control pulse signal.
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