US 12,308,514 B2
Thermal and electrical insulation structure
Sebastien Cremer, Sassenage (FR)
Assigned to STMicroelectronics (Crolles 2) SAS, Crolles (FR)
Filed by STMicroelectronics (Crolles 2) SAS, Crolles (FR)
Filed on Mar. 22, 2022, as Appl. No. 17/701,340.
Claims priority of application No. 2103351 (FR), filed on Mar. 31, 2021.
Prior Publication US 2022/0320722 A1, Oct. 6, 2022
Int. Cl. H01Q 1/38 (2006.01); H01Q 1/00 (2006.01); H01Q 1/22 (2006.01)
CPC H01Q 1/38 (2013.01) [H01Q 1/002 (2013.01); H01Q 1/2283 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic device comprising:
a first wafer including:
a first surface;
at least one trench extending into the first wafer along a first direction; and
a plurality of first regions surrounding the at least one trench, the plurality of first regions each having a first surface coplanar with the first surface and a second surface extending along the first direction;
a second wafer hybrid bonded to the first wafer, the second wafer including a plurality of second regions each on a respective one of the plurality of first regions, each second region having a third surface extending along the first direction that is separated, along a second direction transverse to the first direction, from the respective second surface; and
at least one enclosed space at the level of the trench of the first wafer.