US 12,308,347 B2
Interconnected stacked circuits
Didier Campos, Charavines (FR)
Assigned to STMicroelectronics (Grenoble 2) SAS, Grenoble (FR)
Filed by STMicroelectronics (Grenoble 2) SAS, Grenoble (FR)
Filed on Apr. 11, 2022, as Appl. No. 17/718,145.
Application 17/718,145 is a division of application No. 16/818,792, filed on Mar. 13, 2020, granted, now 11,302,672.
Claims priority of application No. 1902807 (FR), filed on Mar. 19, 2019.
Prior Publication US 2022/0238492 A1, Jul. 28, 2022
Int. Cl. H01L 25/065 (2023.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01)
CPC H01L 25/0657 (2013.01) [H01L 21/56 (2013.01); H01L 21/76802 (2013.01); H01L 23/3128 (2013.01); H01L 24/13 (2013.01); H01L 24/81 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
a substrate;
a circuit at least partially formed in an active region of the substrate;
an encapsulation block partially encapsulating the circuit, wherein the encapsulation block is formed of a plastic material containing additive particles activatable by a laser radiation;
an electronic package stacked on the substrate;
a via extending through said circuit from the active region of the substrate to a surface of the substrate opposite the active region; and
a contacting element connecting said via to the electronic package.