US 12,308,321 B2
Structures to increase substrate routing density and methods of forming the same
Hsien-Wei Chen, Hsinchu (TW); Meng-Liang Lin, Hsinchu (TW); and Shin-Puu Jeng, Po-Shan Village (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Mar. 11, 2022, as Appl. No. 17/692,252.
Claims priority of provisional application 63/229,873, filed on Aug. 5, 2021.
Prior Publication US 2023/0038892 A1, Feb. 9, 2023
Int. Cl. H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/5384 (2013.01) [H01L 21/486 (2013.01); H01L 23/49816 (2013.01); H01L 23/5381 (2013.01); H01L 23/5385 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H01L 2224/14177 (2013.01); H01L 2224/16235 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a package substrate comprising a first side and a second side opposite to the first side;
a first stacking via formed within the package substrate;
a second stacking via formed within the package substrate;
a first semiconductor die attached to the first side of the package substrate and electrically coupled to the first stacking via;
a second semiconductor die attached to the first side of the package substrate and electrically coupled to the second stacking via;
an interposer separating the first semiconductor die and the second semiconductor die from the package substrate, wherein the first semiconductor die and the second semiconductor die are electrically coupled to one another such that signals are propagated from the first semiconductor die to the second semiconductor die and from the second semiconductor die to the first semiconductor die through electrical pathways formed within the interposer; and
a bridge die attached to the second side of the package substrate and electrically coupled to the first stacking via and the second stacking via,
wherein the first semiconductor die and the second semiconductor die are electrically coupled to one another through the first stacking via, the bridge die, and the second stacking via.