US 12,308,319 B2
Semiconductor device structure with fluorine-catching layer
Kuo-Hui Su, Taipei (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on May 17, 2022, as Appl. No. 17/746,021.
Prior Publication US 2023/0378070 A1, Nov. 23, 2023
Int. Cl. H01L 23/532 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01)
CPC H01L 23/53295 (2013.01) [H01L 21/76804 (2013.01); H01L 21/76829 (2013.01); H01L 21/31116 (2013.01); H01L 21/76844 (2013.01); H01L 21/76846 (2013.01); H01L 23/53238 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a first dielectric layer disposed over a semiconductor substrate;
a second dielectric layer disposed over the first dielectric layer;
a fluorine-catching layer disposed over the second dielectric layer at a position that a bottom surface of the fluorine-catching layer is in contact with a top surface of the second dielectric layer, wherein the fluorine-catching layer includes CaSiO2;
a third dielectric layer disposed over the fluorine-catching layer at a position that a bottom surface of the third dielectric layer is in contact with a top surface of the fluorine-catching layer; and
a conductive via structure penetrating through the third dielectric layer, the fluorine-catching layer, and the second dielectric layer to contact the first dielectric layer, wherein the conductive via structure has a tapered configuration that the conductive via structure has a width gradually reduced from a top surface of the third dielectric layer to the bottom surface of the second dielectric layer.