US 12,308,280 B2
Method of manufacturing semiconductor structure having fins
Chen-Tsung Liao, New Taipei (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Jan. 12, 2022, as Appl. No. 17/573,787.
Prior Publication US 2023/0223298 A1, Jul. 13, 2023
Int. Cl. H01L 21/762 (2006.01); H01L 21/3065 (2006.01); H01L 21/311 (2006.01); H10D 30/01 (2025.01)
CPC H01L 21/76232 (2013.01) [H01L 21/3065 (2013.01); H01L 21/31116 (2013.01); H10D 30/024 (2025.01)] 8 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor structure, comprising:
providing a semiconductor substrate comprising a plurality of initial fin structures;
forming an isolation material covering the plurality of initial fin structures;
performing an anisotropic etching operation on the plurality of initial fin structures and the isolation material to remove top portions of the plurality of initial fin structures and a top portion of the isolation material to form a plurality of fins and an isolation layer surrounding the plurality of fins, wherein an elevational difference between a top surface of the plurality of fins and a top surface of the isolation layer is less than about 10 nm; and
after performing the anisotropic etching operation, performing an isotropic etching operation on the isolation layer to selectively remove a top portion of the isolation layer to form an isolation structure surrounding the plurality of fins, wherein the plurality of fins are not removed or etched by the isotropic etching operation, wherein an etchant of the isotropic etching operation includes a fluorine-containing etchant, wherein a top surface of the isolation structure is below the top surface of the plurality of fins by about 20 nm to about 40 nm.