US 12,308,075 B2
Operation method for a memory device
Chih-Chieh Cheng, Zhubei (TW); Chun-Chang Lu, Yunlin County (TW); and Wen-Jer Tsai, Hualien (TW)
Assigned to MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed by MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed on Feb. 2, 2023, as Appl. No. 18/163,346.
Application 18/163,346 is a division of application No. 17/249,178, filed on Feb. 23, 2021, granted, now 11,600,339.
Prior Publication US 2023/0178156 A1, Jun. 8, 2023
Int. Cl. G11C 16/28 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/30 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/28 (2013.01) [G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/30 (2013.01); G11C 16/3404 (2013.01)] 8 Claims
OG exemplary drawing
 
1. An operation method for a memory device, the operation method including:
increasing a dummy word line voltage to a first dummy word line voltage during a pre-turn on period and lowering the dummy word line voltage when the pre-turn on period is finished;
increasing the dummy word line voltage to a second dummy word line voltage; and
lowering the dummy word line voltage after a read period is finished,
wherein the first dummy word line voltage is lower than the second dummy word line voltage; and
a rising edge where the dummy word line voltage is increased to the second dummy word line voltage is earlier than a rising edge of a selected word line voltage.