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1. A semiconductor device, comprising: a memory cell array; a memory interface; a first peripheral circuit, supporting a first memory protocol; a second peripheral circuit, supporting a second memory protocol different from the first memory protocol; and a voltage detector configured to detect whether the semiconductor device is using the first memory protocol or the second memory protocol; wherein the first peripheral circuit and the second peripheral circuit share the memory cell array and the memory interface; wherein I/O (input/output) pin definitions of the memory interface changes in response to the first memory protocol or the second memory protocol used by the semiconductor device; wherein the first peripheral circuit or the second peripheral circuit is activated in response to an output signal from the voltage detector.
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