US 12,307,977 B2
Pixel circuit, display device, and method of driving display device
Masahito Sano, Kameyama (JP)
Assigned to SHARP DISPLAY TECHNOLOGY CORPORATION, Kameyama (JP)
Appl. No. 18/726,045
Filed by Sharp Display Technology Corporation, Kameyama (JP)
PCT Filed Apr. 28, 2022, PCT No. PCT/JP2022/019265
§ 371(c)(1), (2) Date Jul. 1, 2024,
PCT Pub. No. WO2023/209943, PCT Pub. Date Nov. 2, 2023.
Prior Publication US 2025/0061861 A1, Feb. 20, 2025
Int. Cl. G09G 3/3258 (2016.01); G09G 3/3233 (2016.01)
CPC G09G 3/3258 (2013.01) [G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/061 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/045 (2013.01); G09G 2330/021 (2013.01); G09G 2340/0435 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A pixel circuit provided in a display device that can operate in a pause driving mode in which a driving period and a pause period alternately appear, the driving period including one or a plurality of refresh frame periods during which writing of a data voltage is performed, and the pause period including one or a plurality of non-refresh frame periods during which writing of a data voltage is not performed, the pixel circuit comprising:
a display element configured to emit light at luminance determined based on an amount of a drive current supplied to the display element;
a drive transistor having a control terminal, a first conductive terminal, and a second conductive terminal and provided in series with the display element;
a drive current control node connected to the control terminal of the drive transistor;
a holding capacitor having one terminal connected to the drive current control node;
a write control transistor having a control terminal; a first conductive terminal to which a data voltage is provided; and a second conductive terminal connected to the first conductive terminal of the drive transistor;
a threshold voltage compensation transistor having a control terminal; a first conductive terminal connected to the second conductive terminal of the drive transistor; and a second conductive terminal connected to the drive current control node;
at least one light-emission control transistor having a control terminal, a first conductive terminal, and a second conductive terminal and provided in series with the display element and the drive transistor; and
a reset circuit configured to provide an initialization voltage to the drive current control node after providing an off-voltage to the drive current control node, before the data voltage is provided to the drive current control node through the write control transistor, the drive transistor, and the threshold voltage compensation transistor, in a period, during which the at least one light-emission control transistor is maintained in off state, in a refresh frame period included in the driving period, the off-voltage bringing the drive transistor into off state, and the initialization voltage bringing the drive transistor into on state.