US 12,307,959 B2
Display substrate including a double-gate transistor and voltage stabilizing transistor
Tiaomei Zhang, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 18/021,866
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Jan. 29, 2022, PCT No. PCT/CN2022/075027
§ 371(c)(1), (2) Date Feb. 17, 2023,
PCT Pub. No. WO2023/142049, PCT Pub. Date Aug. 3, 2023.
Prior Publication US 2024/0265863 A1, Aug. 8, 2024
Int. Cl. G09G 3/3225 (2016.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01)
CPC G09G 3/3225 (2013.01) [G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2320/0247 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02)] 17 Claims
OG exemplary drawing
 
1. A display substrate, comprising: a base substrate, a plurality of sub-pixels arranged on the base substrate, a plurality of reference signal lines and a plurality of first light emitting control lines; wherein the sub-pixel includes a sub-pixel driving circuit, and the sub-pixel driving circuit includes: a driving transistor, a compensation transistor, a voltage stabilizing transistor and a first conductive connection portion;
a first electrode of the compensation transistor is coupled to a second electrode of the driving transistor, a second electrode of the compensation transistor is coupled to a gate electrode of the driving transistor, and the compensation transistor includes a double-gate transistor, the double-gate transistor includes two sub-transistors connected in series, and active patterns of the two sub-transistors are coupled to form an intermediate node;
a gate electrode of the voltage stabilizing transistor is coupled to a corresponding first light emitting control line, a first electrode of the voltage stabilizing transistor is coupled to a corresponding reference signal line, and a second electrode of the voltage stabilizing transistor is coupled to the intermediate node through the first conductive connection portion,
wherein the display substrate further includes a plurality of gate lines, and the gate electrode of the compensation transistor is coupled to a corresponding gate line;
the gate line includes at least a portion extending along a first direction, the first conductive connection portion includes at least a portion extending along a second direction, and the first direction intersects the second direction; an orthographic projection of the first conductive connection portion on the base substrate at least partially overlaps an orthographic projection of the gate line on the base substrate.