| CPC G09G 3/2092 (2013.01) [G09G 2310/0297 (2013.01)] | 17 Claims |
|
1. A demultiplexer, comprising a plurality of demultiplexer units, wherein each of the demultiplexer units comprises two first type thin film transistors sharing a source electrode, and two second type thin film transistors are disposed between two of the demultiplexer units adjacent to each other;
wherein the two of the demultiplexer units adjacent to each other are respectively a first demultiplexer unit and a second demultiplexer unit, two first type thin film transistors in the first demultiplexer unit are respectively a first thin film transistor and a second thin film transistor, two first type thin film transistors in the second demultiplexer unit are respectively a third thin film transistor and a fourth thin film transistor, and two second type thin film transistors between the first demultiplexer unit and the second demultiplexer unit are respectively a fifth thin film transistor and a sixth thin film transistor;
the fifth thin film transistor and the second thin film transistor share a drain electrode, and the sixth thin film transistor and the third thin film transistor share another drain electrode;
a gate electrode of the fifth thin film transistor is connected to a gate electrode of the second thin film transistor, and a gate electrode of the sixth thin film transistor is connected to a gate electrode of the third thin film transistor;
the gate electrode of the fifth thin film transistor comprises a first subsection and a second subsection vertically connected to each other, and the first subsection is vertically connected to a middle part of the gate electrode of the second thin film transistor; and
the gate electrode of the sixth thin film transistor comprises a third subsection and a fourth subsection vertically connected to each other, and the third subsection is vertically connected to a middle part of the gate electrode of the third thin film transistor;
wherein all of the gate electrode of the second thin film transistor, the gate electrode of the third thin film transistor, the second subsection, and the fourth subsection are arranged in a first direction, both the first subsection and the third subsection are arranged in a second direction, and the first direction is perpendicular to the second direction;
wherein the gate electrode of the second thin film transistor, the first subsection, and the second subsection are combined to form a first shape, and the first shape is h-shaped; and
the gate electrode of the third thin film transistor, the third subsection, and the fourth subsection are combined to form a second shape, and the second shape is a shape formed by flipping the first shape horizontally and vertically.
|