US 12,307,747 B2
In-situ detection of anomalies in integrated circuits using machine learning models
Sriram R. Vangal, Portland, OR (US); Hyochan An, Ann Arbor, MI (US); Vivek K. De, Beaverton, OR (US); Narayan Srinivasa, San Jose, CA (US); Farzin G. Guilak, Beaverton, OR (US); Miguel Bautista Gabriel, Austin, TX (US); and Pratik Dasharathkumar Patel, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 13, 2021, as Appl. No. 17/549,583.
Prior Publication US 2022/0101625 A1, Mar. 31, 2022
Int. Cl. G06V 10/774 (2022.01); G06N 3/04 (2023.01); G06V 10/22 (2022.01); G06V 10/74 (2022.01); G06V 10/771 (2022.01); G11C 29/12 (2006.01); G11C 29/40 (2006.01); G11C 29/42 (2006.01)
CPC G06V 10/774 (2022.01) [G06N 3/04 (2013.01); G06V 10/23 (2022.01); G06V 10/761 (2022.01); G06V 10/771 (2022.01); G11C 29/1201 (2013.01); G11C 29/42 (2013.01); G11C 2029/4002 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for in-situ detection of an anomaly in an integrated circuit (IC), the method comprising:
receiving, by a processing unit in the IC, a sensor dataset generated by one or more sensors in the IC, the sensor dataset including information reflecting one or more conditions of the IC;
extracting, by the processing unit in the IC, features from the sensor dataset;
inputting, by the processing unit in the IC, the features into a model in the IC, wherein the model has been trained to detect and classify anomalies in integrated circuits;
outputting, by the model, one or more classifications of the anomaly in the IC, wherein the model determines the one or more classifications of the anomaly based on a first subset of the features;
identifying a second subset of the features, the second subset of features including one or more features that are not in the first subset; and
further training the model by using the one or more features in the second subset and one or more labels of the one or more features.