US 12,306,714 B2
Data memory emulation in flash memory
Jawad Benhammadi, Pont de Claix (FR)
Assigned to STMicroelectronics (Alps) SAS, Grenoble (FR)
Filed by STMicroelectronics (Alps) SAS, Grenoble (FR)
Filed on May 8, 2023, as Appl. No. 18/313,686.
Claims priority of application No. 2205050 (FR), filed on May 25, 2022.
Prior Publication US 2023/0385149 A1, Nov. 30, 2023
Int. Cl. G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 12/02 (2006.01); G06F 13/16 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 12/0246 (2013.01); G06F 13/1668 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
performing a first write operation comprising writing a first data packet to a first portion of a first line of a flash memory, wherein the first line of the flash memory comprises a first number of memory cells; and
performing a second write operation comprising writing a second data packet to a second portion of the first line of the flash memory, wherein the first line comprises the first data packet and the second data packet after performing the first write operation and the second write operation, wherein the first portion and the second portion of the first line of the flash memory together comprise a second number of the memory cells less than the first number of memory cells, the first portion and the second portion of the first line of the flash memory together have an access granularity of at least the second number, and the second portion of the first line of the flash memory is in an unprogrammed state prior to performing the second write operation.