US 12,306,713 B2
Method of performing a multiplication and accumulation (MAC) operation in a processing-in- memory (PIM) device
Jeong Jun Lee, Gwangju-si (KR); and Choung Ki Song, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jun. 9, 2023, as Appl. No. 18/332,647.
Application 18/332,647 is a continuation of application No. 17/002,341, filed on Aug. 25, 2020, granted, now 11,720,441.
Claims priority of application No. 10-2019-0117098 (KR), filed on Sep. 23, 2019.
Prior Publication US 2023/0315567 A1, Oct. 5, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/10 (2006.01); G06F 7/50 (2006.01); G06F 7/523 (2006.01); G06F 7/544 (2006.01)
CPC G06F 11/1048 (2013.01) [G06F 7/50 (2013.01); G06F 7/523 (2013.01); G06F 7/5443 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method of executing a multiplication and accumulation (MAC) calculation of an arithmetic-in-memory (AIM) device, the method comprising:
outputting first data and a parity from a first storage region;
outputting second data from a second storage region;
simultaneously executing an error correction code (ECC) calculation of the first data and the parity and a multiplying calculation of the first and second data;
generating an error code indicating an error location of the first data as a result of the ECC calculation;
outputting multiplication result data corresponding to a result of the multiplying calculation when no error exists in the first data based on the error code; and
executing a compensating calculation of the multiplication result data to output the compensated multiplication result data when an error exists in the first data based on the error code.