US 12,306,682 B2
On-board computer with interposer on the microprocessor chip
Christophe Poilvet, Moissy-Cramayel (FR); Nicolas Charrier, Moissy-Cramayel (FR); and Michael Montoya, Moissy-Cramayel (FR)
Assigned to SAFRAN ELECTRONICS & DEFENSE, Paris (FR)
Appl. No. 17/778,528
Filed by SAFRAN ELECTRONICS & DEFENSE, Paris (FR)
PCT Filed Nov. 20, 2020, PCT No. PCT/FR2020/052142
§ 371(c)(1), (2) Date May 20, 2022,
PCT Pub. No. WO2021/099750, PCT Pub. Date May 27, 2021.
Claims priority of application No. 1913042 (FR), filed on Nov. 21, 2019.
Prior Publication US 2022/0413574 A1, Dec. 29, 2022
Int. Cl. G06F 1/20 (2006.01); H01L 23/367 (2006.01); H05K 7/20 (2006.01)
CPC G06F 1/206 (2013.01) [H01L 23/367 (2013.01); H05K 7/2039 (2013.01)] 10 Claims
OG exemplary drawing
 
1. An on-board computer comprising a microprocessor chip with a lower face and an upper face, a quadrilateral chip carrier having at least two lateral adjacent side walls with a common endpoint and an upper face on which the microprocessor chip is mounted, and a casing configured to discharge heat generated by the microprocessor chip in operation,
wherein an interposer is disposed between the upper face of the microprocessor chip and the casing of the on-board computer, the interposer being carried by the upper face of the microprocessor chip and having a thickened periphery and a center forming a cavity accommodating the upper face of the microprocessor chip, said interposer resting on the upper face of the microprocessor chip and not on the chip carrier by the thickened periphery, said interposer being configured to diffuse the heat transmitted by the upper face of the microprocessor chip towards the casing of the on-board computer, the interposer having an upper surface for heat exchange with the casing of the on-board computer and a surface area of the upper surface of the interposer is at least twice greater than a surface area of the upper face of the microprocessor chip, and
wherein the interposer has on two adjacent sides with a common endpoint two peripheral wedging rims extending on a side opposite to the upper face of the interposer, beyond the thickened periphery and each coming into contact with against a respective lateral adjacent side wall of the chip carrier thereby serving as a positioning reference in two directions perpendicular to the two adjacent side walls of the chip carrier, the interposer having no more than two peripheral wedging rims, in order to leave other sides of the interposer free, thereby allowing the installation of the interposer through sliding of the interposer on the upper face of the microprocessor chip until the peripheral wedging rims come into contact with the side walls of the chip carrier, and configured to permit air to enter a free space defined by a lower face of the interposer and the upper face of the chip carrier.