| CPC G02F 1/136213 (2013.01) [G02F 1/134372 (2021.01); G02F 1/13606 (2021.01); G02F 1/136218 (2021.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01)] | 14 Claims |

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1. An array substrate, comprising:
a base substrate;
a plurality of data lines extending along a first direction and a plurality of gate lines extending along a second direction, and a plurality of pixel units defined by the gate lines and the data lines;
wherein a pixel unit comprises a thin-film transistor, a common electrode and a pixel electrode, and the thin-film transistor comprises a gate electrode, a source and drain electrode and an active layer, wherein the pixel electrode and an adjacent gate line thereof have a gap region in the first direction;
the pixel unit further comprises a first auxiliary electrode and a second auxiliary electrode, wherein the first auxiliary electrode is electrically connected to the common electrode, and the second auxiliary electrode is electrically connected to the source and drain electrode; wherein
an orthographic projection of the first auxiliary electrode on the base substrate at least partially overlaps an orthographic projection of the second auxiliary electrode on the base substrate, and the first auxiliary electrode is located within the gap region;
wherein a length of the first auxiliary electrode and the second auxiliary electrode in the second direction is equal to a length of the pixel electrode in the second direction;
wherein a length of the first auxiliary electrode in the first direction is greater than one-third of a length of the gate line in the first direction and less than one-half of the length of the gate line in the first direction.
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