US 12,306,216 B2
Dynamic voltage regulator sensing for chiplet-based designs
Vikrant Thigle, Bangalore (IN); Vijay Anand Mathiyalagan, Austin, TX (US); Anand Haridass, Karnataka (IN); Arun Chandrasekhar, Bangalore (IN); and Gerald Pasdast, San Jose, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 6, 2022, as Appl. No. 18/076,352.
Prior Publication US 2024/0183884 A1, Jun. 6, 2024
Int. Cl. G01R 19/25 (2006.01); G01R 19/00 (2006.01); G05F 1/46 (2006.01)
CPC G01R 19/0038 (2013.01) [G01R 19/25 (2013.01); G05F 1/46 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a die comprising a power distribution network which is to receive power from a voltage regulator external to the die;
one or more analog-to-digital converters (ADCs) on the die coupled to the power distribution network, wherein the one or more ADCs are to digitize voltages of one or more sense points in the power distribution network for output from the die; and
a base layer on which the die is mounted by a plurality of bumps, wherein at least a first bump of the plurality of bumps is coupled to the power distribution network and is to receive the power from the voltage regulator, and at least a second bump of the plurality of bumps is to provide digitized voltages of the one or more ADCs to the voltage regulator.